This workshop brings together leading UK and US industry, government and academic experts in semiconductor security to discuss the challenges and opportunities in this sector. The outputs of the workshop will be published as a whitepaper. The themes of the workshop will include:
- Hardware Security Primitives
- RISC-V security
- Semiconductor supply chain security
- Hardware-based attacks and countermeasures
- Formal methods and tools for secure design and verification
- System security
Workshop Chairs
Speakers
AGENDA – DAY 1 – 28th November 2023
08:30 – 09:30 | Registration & Welcome (Ministerial and others) |
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09:30 – 09:45 | UK Semiconductor Strategy Richard Duffy, Department for Science, Innovation and Technology (DSIT), UK |
09:45 – 10:00 | US CHIPS Act Mike O’Brien, CHIPS Program Office, US |
10:00 – 10:15 | NCSC Perspective UK National Cyber Security Centre (NCSC), UK |
10:15 – 10:30 | DHS Perspective Dr. Pauline Paki, Department of Homeland Security (DHS), US |
10:30 – 10:45 | DARPA Perspective James Wilson, DARPA, US |
10:45 – 11:20 | Break & Networking |
11:20 – 11:40 | Dan O’Loughlin, VP Engineering, Qualcomm, US |
11:40 – 12:00 | Adam Cron, Distinguished Architect, Synopsys, US |
12:00 – 12:20 | John Oakley, Science Director, Semiconductor Research Corporation (SRC), US |
12:20 – 13:00 | Emerging Research Prof. John Goodenough, University of Sheffield, UK Prof. Waleed Khalil, Ohio State University, US Prof. Farinaz Koushanfar, University of California, San Diego, US |
13:00 – 14:00 | Lunch & Networking |
14:00 – 15:00 | Panel Discussion: Is Secure-by-Design Hardware Achievable? Chair: John Oakley, SRC Panellists: Prof. Bob Madahar, DSTL, UK Prof. John Goodacre, Director, DSbD Programme, UK Dr. Patrik Ekdahl, Ericsson, UK Manuel Offenberg, Seagate Federal, Inc., US Sid Allman, Senior Technical Director, Marvell, US |
15:00 – 15:20 | Dr. Angela Dalton, Director of Research and Advanced Development, AMD, US |
15:20 – 15:40 | Break |
15:40 – 16:00 | Doug Gardner, Chief Technologist, Analog Devices, US |
16:00 – 16:20 | David Maidment, Senior Director Secure Devices Ecosystem, Arm, UK |
16:20 – 17:00 | Emerging Research Dr. Shreyas Sen, Purdue University, US Prof. Simon Moore, University of Cambridge, UK Dr. Aydin Aysu, North Carolina State University, US |
17:00 | Day 1 – Closing Remarks |
AGENDA – DAY 2 – 29th November 2023
09:00 – 09:30 | Day 2 Welcome |
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09:30 – 10:10 | Emerging Research Session Prof. Gang Qu, University of Maryland, US Prof. John Goodacre, University of Manchester, UK Dr. Farimah Farahmandi, University of Florida, US |
10:10 – 10:30 | Sid Allman, Senior Technical Director, Custom Silicon Architecture & Solutions, Marvell Technologies, US |
10:30 – 10:50 | Shawn Fetterolf, Intel, US |
10:50 – 11:20 | Break & Networking |
11:20 – 11:40 | Manuel Offenberg, CTO/Chief Architect, Seagate Federal, Inc., US |
11:40 – 12:20 | Emerging Research Dr. Dan Page, University of Bristol, UK Prof. Ramesh Karri, New York University, US Dr. Ahmad Atamli, University of Southampton, UK |
12:20 – 13:30 | Round Table Discussions: Pre-Silicon Security – Security of IPs and SoCs at the higher levels of abstractions. Chair: Adam Cron, Synopsys Post-Silicon Security – Security requirements during post-silicon validation. Chair: Doug Gardner, Analog Devices System Security – Security of a complete system (hardware, software and firmware) given the complex interactions between the many components in the system. Chair: Prof. John Goodenough, University of Sheffield Supply Chain Security – Security of the electronics supply chain and techniques to ensure security of devices and systems. Chair: Prof. Waleed Khalil, Ohio State University |
13:30 – 14:30 | Lunch & Networking |
14:30 – 15:00 | Round Table Discussion Feedback – Report back on high-level ideas from discussions |
15:00 – 15:30 | Closing & Future Collaborative Opportunities |