The UK Research Institute in Secure Hardware and Embedded Systems (RISE) aims to bring together the hardware security community in the UK to build a strong network of national and international research partnerships, accelerating the industrial uptake of research outputs and its translation into new products, services and business opportunities for the wider benefit of the UK economy. RISE is funded by the Engineering and Physical Sciences Research Council and the National Cyber Security Centre.

RISE seeks to address the following research challenges:

1. Understanding the behaviour of technologies at the root of hardware security.

      • What makes a resilient hardware security primitive?
      • How do we analyse hardware behaviours to ensure technologies work as desired and are trustworthy?
      • How can novel primitives be used to provide trust to a system?
      • How do we advance secure-by-design technologies?
      • Can we develop hardware security metrics to help assess the effectiveness of security technologies?
      • How to evaluate hardware security vulnerabilities of new computing technologies, e.g neuromorphic, quantum, biological?

2. Developing more secure products.

      • What novel architectures (hardware or hardware/software) add to the security of a product or system?
      • Can we understand the security of a system of components with their own individual security properties?
      • How can we make a product or system more resilient to faults and attacks?
      • Can hardware be used to replace or simplify security elsewhere in a system?
      • Can we enhance security without significantly impacting performance and energy efficiency?

3. Maintaining confidence in security throughout the design and manufacturing processes.

      • How can we improve hardware security in automated semiconductor design and manufacturing processes?
      • Can we develop new (trustworthy) AI approaches for automating security verification, creating more accurate and efficient AI models for security analysis, and integrating these technologies into the hardware design lifecycle?
      • What tools and techniques could help to reduce the risks associated with third party hardware design and manufacturing services?
      • Can we build security mechanisms with hardware traceability and provenance functionality?

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TruDetect: Trustworthy Deep-Learning based Hardware Trojan Detection
Prof Máire O’Neill, Dr Ihsen Alouani, Dr Niall McLaughlin, Queen’s University of Belfast

CHERI memory protection: pathways to industrial adoption
Prof Robert Watson, Prof Simon Moore, Prof Peter Sewell, Dr Peter Neumann, Brooks Davis, University of Cambridge

Quantum-Driven crypto primitives at the heart of Hardware Root of Trust (HRoT)
Ranga Desikachari, Crypto Quantique

Single-Stepping Attacks and Defences for Confidential VMs
Luca Wilke, University of Lübeck

Towards Secure Integrated Semiconductor Systems
Prof John Goodenough, University of Sheffield

SECCOM: Securing Composable Hardware Platforms
Prof John Goodacre, Prof Lucas Cordiero, University of Manchester

IOTEE: Securing and analysing trusted execution beyond the CPU
Dr Ahmad Atamli, Prof Vladi Sassone, Peiyao Sun, University of Southampton, Prof David Oswald, Prof Mark Ryan, University of Birmingham

Ahoi Attacks: Breaking Confidential VMs with Malicious Interrupts
Dr Shweta Shinde, ETH Zurich

Building secure hardware with Open Silicon at lowRISC
Dr Greg Chadwick, lowRISC

How to work with industry
Dr Carl Shaw, Codasip

Relentless evaluation of the foundational security of AWS Nitro systems early in the design
Rene Henriquez and Dr Zitai Chen, Amazon Web Services

Leaky Abstractions
Dr Alastair Reid – Senior Principal Engineer at Intel.

DPU Technology – Redefining next generation Datacenter Security
Prof Sakir Sezer – Queens University Belfast

Adaptive Trust Principles: the Foundation of Next Generation Vehicle
Shadi Razak – CTO at Angoka

Panel Session: Research to Reality
Louise Cushnahan, Shadi Razak, James Patrick Evans, Osney Capital

Protecting IoT in the Wild
Keith Graham – Head of University Program at Codasip

To Trusted Hardware (and back again?)
Hugo Vincent – Head of Security Group at Arm Research

Digital Security by Design, Challenge Update
Prof John Goodacre – Challenge Director at DSbD

A Deep Dive into FPGA Technology from a Security Perspective
Prof Dirk Koch, Heidelberg University

Practical and Formal Analysis Security of Contactless Mobile Payments
Dr Ioana Boureanu, University of Surrey

5G: Security from start to finish
Aaron Hogan - Engineering Director, Qualcomm

A Stab in the Dark: Blind attacks on the Linux Kernel
Professor Herbert Bos, VUSec Systems Security research group, Vrije Universiteit Amsterdam

IOSEC: Protection and Memory Safety for Input/Output Security

SCARV: A Side-Channel Hardened RISC-V Platform

User-controlled hardware security anchors: evaluation and designs

DeepSecurity:  Applying Deep Learning to Hardware Security

rFAS: Reconfigurable FPGA Accelerator Sandboxin

SafeBet-Memory capabilities to enable safe, aggressive speculation in processors

GUPT: A Hardware-Assisted Secure and Private Data Analytics Service

TimeTrust: Robust Timing via Hardware Roots of Trust and Non-standard Hardware, with Application to EMV Contactless Payments

Mind the Gap: Promises, Pitfalls and Opportunities of Hardware-Assisted Security
Ahmad-Reza Sadeghi, TU Darmstadt

Hardware based Lightweight Authentication for IoT Applications
Gang Qu, University of Maryland

Perspectives on hardware security: embedding it everywhere, continuously and inexpensively
Massimo Alioto, National University of Singapore

PUF: From Research to Practice
Chongyan Gu, Queen’s University Belfast

Winning the War in Memory
Simon Moore, University of Cambridge

ARM's perspective on the importance of hardware security research
Richard Grisenthwait, ARM

CHERI - Architectural support for memory protection and compartmentalisation
Robert Watson, University of Cambridge

Accelerating Innovation
Louise Cushnahan, CSIT, Queen’s University Belfast

Why, Who, How and Where of Standards!
Charles Brookson, OBE

How to use Deep Learning for hardware security testing
Marc Witteman, Riscure

Software-based Microarchitectural Attacks
Dr Daniel Gruss, Graz University of Technology

Physical Attacks: Towards combined threat, protection and beyond
Shivam Bhasin, David Berend, Nanyang Technical University Singapore